FIG. 1 is a schematic circuit diagram of a conventional display panel. The display panel 10 comprises a gate driving circuit 100, a source bus 150 and plural pixel elements p11˜p24.
The gate driver 110 generates a gate pulse signal Gn and Gn+1 according to a previous gate pulse signal Gn−1, Gn and a clock signal set CLK1˜CLKx. The gate pulse signal Gn and Gn+1 is transmitted to the next-stage gate driver 120 and the corresponding row of pixel elements p11˜p24 through the corresponding gate line. Video signals Sn−1, Sn, Sn+1, Sn+2 generated by the source driver are transmitted to the corresponding column of pixel elements p11 and p24 through the source lines of the source bus 150. Each pixel element p12˜p24 comprises a switch transistor Md and a storage capacitor Cs.
The switch transistors Md are turned on in response to a high voltage level of the gate pulse signals Gn and Gn+1, and thus the corresponding pixel elements are turned on. The high voltage level is referred as a high gate voltage (VGH). Moreover, the switch transistors Md are turned off in response to a low voltage level of the gate pulse signals Gn and Gn+1, and thus the corresponding pixel elements are turned off. The low voltage level is referred as a low gate voltage (VGL).
The off current can be considered as a leakage current. The off current is proportional to the voltage difference between the gate terminal and the source terminal of the switch transistors Md (i.e., a gate-source voltage Vgs). As the gate-source voltage Vgs increases, the off current increases. The increase of the off current may result in deteriorated image quality and flickering frame of the display panel and cause higher power consumption of the source driver.